Sunday, September 24, 2023 wins unrivaled latencies in STAC-ML™ benchmarks with its VOLLO product

By ET Bureau - December 19, 2022 3 Mins Read™-benchmarks-with-its-VOLLO-product , a recognized leader in accelerating machine learning inference, announced today that its VOLLO™ product achieved the lowest latencies ever for the STAC-ML™ Markets (Inference) has reached. These benchmarks were established by the STAC Benchmark Council™, which includes the world’s largest global banks, brokers, exchanges, hedge funds, proprietary trading desks and wealth managers, and more than 50 leading technology providers. They are a tool to compare different platforms in terms of latency, throughput, efficiency and quality in machine learning (ML) inference.

VOLLO achieved latencies of only 24 microseconds with a throughput of more than 170,000 inferences per second 1 . This unmatched performance in latency and throughput enables users to make smarter decisions with more complex models, faster than in the past, giving them a competitive advantage in terms of trading, risk analysis, quotations, and many other trading-related activities. Designed for easy and quick installation on servers in a common location, VOLLO also enables a reduction in rack space and energy consumption, two precious resources in such locations.

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VOLLO runs on a standard form factor Intel FPGA-based PCIe accelerator card, of which up to four can be installed in a 1U server. VOLLO can be configured with customer-trained models using model architectures from the LSTM model zoo, allowing users to deploy a range of workloads tailored to their application needs via an export process from standard ML tool flows . It can support up to 12 parallel models per FPGA accelerator board installed in the system and allows a maximum of 48 parallel models for a four board system.

A key technology is the Intel Agilex F-Series FPGA. “Intel Agilex FPGAs are an excellent deployment platform for our new fintech inference solution,” said Peter Baldwin , CEO of “Agilex FPGAs have enabled us to quickly achieve excellent performance on these new STAC machine learning benchmarks. With hardened bfloat16 support and ample on-chip RAM, they are ideally suited to accelerating the recurring networks in the STAC benchmarks wherever deployed as those workloads evolve and scale.”

As a Titan partner in the Intel Partner Alliance, Intel supported in the development of VOLLO. “These results show what can be achieved when you combine Intel’s leading FPGAs with Myrtle’s expertise in AI/ML accelerators,” said Jim Dworkin , vice president and general manager of the Cloud & Enterprise Acceleration Division at Programmable Intel’s Solutions Group, “We are excited to be working with Myrtle to combine their remarkable technology with Intel Agilex FPGA to the benefit of our customers, and we thank STAC for their leadership in setting relevant benchmarks for the industry.”

“STAC benchmarks are established by financial firms based on their business needs, and they developed this benchmark to compare inference performance across multiple architectures,” commented STAC® President Peter Nabicht -ML benchmark results achieved with FPGA technology, providing valuable data points for financial firms looking for the best solution for their needs.”

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